| Year | Title | Altmetric |
|---|---|---|
| 2011 | Maximum error modeling for fault-tolerant computation using maximum a posteriori (MAP) hypothesis.
Microelectronics Reliability.
51:485-501.
2011
|
|
| 2009 | Probabilistic error modeling for nano-domain logic circuits
2009
|
|
| 2009 | Study of Circuit-Specific Error Bounds for Fault-Tolerant Computation using Maximum a posteriori (MAP) Hypothesis.
CoRR.
abs/0906.3282.
2009
|
|
| 2006 | A stimulus-free graphical probabilistic switching model for sequential circuits using dynamic Bayesian networks
2006
|
|
